Multi-tiered integrated circuit package
US8354743B2 · kind B2 · utility
14Cited by
22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2010 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Dec 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package base includes a plurality of tiers. In some examples, an integrated circuit package encloses a plurality of stacked integrated circuits that are each electrically coupled to an electrical contact located on a respective tier of the package base. The tiers of the integrated circuit package can have different elevations relative to a bottom surface of the integrated circuit package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.