Patent · US Active

Flash memory having multi-level architecture

US8355281B2 · kind B2 · utility

5Cited by
5References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 20, 2010
Grant dateJan 15, 2013
Priority date—
Expiry dateMar 25, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Subject matter disclosed herein relates to a multi-level flash memory and a process flow to form same.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.