Diagonal connection storage array
US8358526B2 · kind B2 · utility
2Cited by
4References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 27, 2009 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | May 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one aspect, an electronic memory array includes overlapping, generally parallel sets of conductors, and includes storage elements near each point of overlap. One set of conductors has a non-negligible resistance. An address path for each storage element traverses a portion of one each of the first and second sets of conductors and a selectable resistance element. All storage element address paths have substantially equivalent voltage drops across the corresponding storage elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.