Method and apparatus for generating data bus interface circuitry
US8359557B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2011 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | May 3, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for generation of a circuit design. A plurality of components, including at least a processor and a peripheral device, is instantiated in a circuit design. One or more parameterizable data bus interface blocks are automatically selected based on the master-slave relationships, requirements, and capabilities of the components. The one or more parameterizable data bus interface blocks are instantiated in the circuit design. In response to user input, values are assigned to one or more parameters of the processor. The plurality of components and data bus interface blocks are automatically parameterized by determining appropriate parameter values according to the parameters of the processor and capabilities and requirements of the components and data bus interface blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.