Semiconductor device and structure

US8362482B2 · kind B2 · utility

Assignee

• Monolithic 3D Inc. · US

Inventors

• Zvi Or-Bach · San Jose, US
• Brian Cronquist · Klamath Falls, US
• Israel Beinglass · Sunnyvale, US
• Jan Lodewijk de Jong · Cupertino, US
• Deepak C. Sekar · Sunnyvale, US
• Paul Lim · Fremont, US

Key dates

• Filing date: Jan 28, 2011
• Grant date: Jan 29, 2013
• Expiry date: Jan 28, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/60
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device including a first layer including first transistors, wherein first logic circuits are constructed by the first transistors, and wherein the first logic circuits include at least one of Inverter, NAND gate, or NOR gate; and a second layer overlaying said first layer, the second layer including second transistors, wherein second logic circuits are constructed by the second transistors; wherein each logic circuit in the first logic circuits has inputs and at least one first output, the inputs are connected to the second logic circuits; wherein each logic circuit in the second logic circuits has a second output, and wherein the first transistors include first selectors adapted to selectively replace at least one of the at least one first outputs with at least one of the second outputs.