Method and system for assessing reliability of integrated circuit
US8362794B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2009 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Mar 13, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2894
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention provides a method. The method includes operating a plurality of field-effect-transistors (FETs) under a first operation condition; reversing an operation direction for at least one of the plurality of FETs for a brief period of time; measuring a second operation condition of the one of the plurality of FETs during the brief period of time; computing a difference between the second operation condition and a reference operation condition; and providing a reliability indicator based upon the difference between the second and the reference operation conditions, wherein the plurality of FETs are employed in a single integrated circuit (IC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.