Semiconductor substrate planarization apparatus and planarization method
US8366514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2010 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Jun 7, 2031 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/00
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A planarization apparatus and method that thins and planarizes a substrate by grinding and polishing the rear surface of the substrate with high throughput, and that fabricates a semiconductor substrate with reduced adhered contaminants. A planarization apparatus that houses various mechanism elements in semiconductor substrate loading/unloading stage chamber, a rear-surface polishing stage chamber, and a rear-surface grinding stage chamber. The throughput time of the rear-surface polishing stage that simultaneously polishes two substrates is typically about double the throughput time of the rear-surface grinding stage that grinds one substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.