Method for creating a metal crystalline region, in particular in an integrated circuit
US8367547B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2010 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Jul 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76883
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method comprises affixing a thin sheet of crystal (8) onto metal (6) of same type as the sheet but amorphous or of small grain size, deposited in trenches of a substrate (1) to form interconnect lines for example. Annealing progressively imposes the crystalline structure of the sheet onto the lines. When the crystal (8) is removed, highly conductive crystalline lines are obtained since the grains thereof have been greatly enlarged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.