Patent · US Active

SiP substrate

US8372690B2 · kind B2 · utility

0Cited by

5References

12Claims

0Family size

Assignee

FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

Maria Clemens Y. Quinones · Tagbao, PH
Ruben Madrid · Talisay, PH

Key dates

Filing date	Jan 13, 2011
Grant date	Feb 12, 2013
Priority date	—
Expiry date	Jan 13, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/13091
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Disclosed in this specification is a system-in-a-package substrate that includes an interconnect substrate for permitting finely pitched connections to be made to an integrated circuit. The interconnect substrate includes a central region on its upper surface for receiving the integrated circuit. The interconnect substrate also has interconnections that electrically connect the finely pitched contacts on the upper surface to larger pitched contacts on the lower surface. The larger pitched contacts connect to a conductive trace frame. The resulting assembly is encased in a molding compound along with a plurality of other devices which are configured to interact with one other through the conductive trace.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.