Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same

US8373209B2 · kind B2 · utility

Assignee

• DENSO CORPORATION · JP

Inventors

• Rajesh Kumar Malhan · Nagoya, JP
• Naohiro Sugiyama · Nagoya, JP

Key dates

• Filing date: Dec 21, 2010
• Grant date: Feb 12, 2013
• Expiry date: Aug 18, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8325

Abstract

A semiconductor device includes: a substrate; and depletion and enhancement mode JFETs. The depletion mode JFET includes: a concavity on the substrate; a channel layer in the concavity; a first gate region on the channel layer; first source and drain regions on respective sides of the first gate region in the channel layer; first gate, source and drain electrodes. The enhancement mode JFET includes: a convexity on the substrate; the channel layer on the convexity; a second gate region on the channel layer; second source and drain regions on respective sides of the second gate region in the channel layer; second gate, source and drain electrodes. A thickness of the channel layer in the concavity is larger than a thickness of the channel layer on the convexity.