Ring bus structure and its use in flash memory systems
US8375146B2 · kind B2 · utility
307Cited by
43References
37Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 9, 2004 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Nov 18, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and integrated circuit chips used in the system utilize a bus in the form of a ring to interconnect nodes of individual components for transfer of data and commands therebetween. An example system described is a memory having one or more re-programmable non-volatile memory cell arrays connected to each other and to a system controller by a ring bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.