Soft-bounded hierarchical synthesis

US8375345B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Harry Barowski · Balingen, DE
• Harald Mielich · Stuttgart, DE
• Friedrich Schröder · Stuttgart, DE
• Alexander Wörner · Bingen, DE

Key dates

• Filing date: Feb 16, 2012
• Grant date: Feb 12, 2013
• Expiry date: Feb 16, 2032

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2119/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A large block synthesis (LBS) process pre-optimizes selected submacros by synthesizing the submacros using timing assertions and placement abstracts, removing placement information, and assigning weights to the internal nets of the submacros that are much higher than weights used for external (e.g., top-level) nets. The timing assertions include an input arrival time, a required output arrival time, and an output pin capacitance loading for the logic block, and the placement abstract is generated by condensing input and output pins of the logic block at a center of gravity of the logic block. The submacros to be pre-optimized can automatically be identified using an attribute to indicate pre-optimization, or by determining that the submacro is one of many instances in the design. The higher weights for the submacro nets define soft-bounds for the logic which still allow relocation of submacro components. The pre-optimization results in significantly reduced synthesis runtime.