Patent · US Active

Driven metal critical dimension (CD) biasing

US8375347B2 · kind B2 · utility

2Cited by
0References
20Claims
0Family size

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Inventors

Key dates

Filing dateMay 12, 2009
Grant dateFeb 12, 2013
Priority date
Expiry dateJan 16, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of designing an integrated circuit (“IC”) is provided that includes placing an IC design, where the IC design includes a first element, a second element, and a path coupling the first and second elements, and routing the IC design. Further, the method includes obtaining at least one of resistivity data and capacitance data related to the path, and obtaining timing data related to the path. The method also includes using at least one of the resistivity data, the capacitance data, and the timing data to determine a critical dimension (“CD”) bias to be applied to the path, and modifying the IC design, where modifying includes applying the CD bias to the path.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.