Auto parallelization of zero-trip loops through the induction variable substitution
US8375375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2009 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Dec 16, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a max{0,N} variable for loop iterations in case of no information is known about the value of N, for a typical loop iterating from 1 to N, in which N is the loop invariant. For the nested basic induction variables, an induction variable substitution process is applied to the nested loops starting from the innermost loop to the outermost one. Then a removal of the max operator afterwards through a copy propagation pass of the IBM compiler is provided. In doing so, the loop dependency on the induction variable is eliminated and an opportunity for a parallelizing compiler to parallel the outermost loop is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.