Method for the double sided polishing of a semiconductor wafer

US8376811B2 · kind B2 · utility

Assignee

• Siltronic AG · DE

Inventor

• Juergen Schwandner · Garching bei München, DE

Key dates

• Filing date: Apr 30, 2010
• Grant date: Feb 19, 2013
• Expiry date: Jul 13, 2031

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B24B37/08
• WIPO field: Machine tools
• WIPO sector: Mechanical engineering

Abstract

Semiconductor wafers are double sided polished by a method of polishing a frontside of the wafer in a first step with a polishing pad with fixed abrasive and simultaneously polishing a backside of the wafer with a polishing pad containing no abrasive, but during which an abrasive polishing agent is introduced between the polishing pad and the backside of the wafer, inverting the wafer, and then in a second step polishing the backside of the wafer with a polishing pad containing fixed abrasive and simultaneously polishing the frontside of the wafer with a polishing pad containing no fixed abrasive, a polishing agent containing abrasive being introduced between the polishing pad and the frontside of the semiconductor wafer.