Method for fabricating SOI high voltage power chip with trenches

US8377755B2 · kind B2 · utility

Assignee

• SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Xinhong Cheng · Shanghai, CN
• Zhongjian Wang · Nanhu, CN
• Yuehui Yu · Shanghai, CN
• Dawei He · Cupertino, US
• Dawei Xu · Inagi, JP
• Chao Xia · 红钢城街道, CN

Key dates

• Filing date: Sep 7, 2010
• Grant date: Feb 19, 2013
• Expiry date: Nov 13, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/111

Abstract

A method of manufacturing a SOI high voltage power chip with trenches is disclosed. The method comprises: forming a cave and trenches at a SOI substrate; filling oxide in the cave; oxidizing the trenches, forming oxide isolation regions for separating low voltage devices at the same time; filling oxide in the oxidized trenches; and then forming drain regions, source regions and gate regions for a high voltage power device and low voltage devices. The process involves depositing an oxide layer overlapping the cave of the SOI substrate. A SOI high voltage power chip thus made will withstand at least above 700V voltage.