Method of reducing solder wicking on a substrate
US8378222B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2009 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Dec 11, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This invention relates to a substrate with via and pad structure(s) to reduce solder wicking. Each via and pad structure connects a component to conductive layers associated with the substrate. The substrate includes one or more plated vias, solder mask(s) surrounding the plated vias, and a conductive pad with a conductive trace connected to each plated via. The conductive pad extends beyond the terminal sides to increase solder formation and the solder mask reduces solder formation at the terminal end of the component. The via and pad structure is suitable for a variety of components and high component density. The invention also provides a computer implemented method for calculating the maximum distance of a conductive pad extending beyond the terminal side of a component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.