Patent · US Active

Semiconductor substrate with interlayer connection and method for production of a semiconductor substrate with interlayer connection

US8378496B2 · kind B2 · utility

22Cited by

8References

17Claims

0Family size

Assignee

austriamicrosystems AG

Inventors

Franz Schrank · Graz, AT
Martin Schrems · Langenbruck, DE
Jochen Kraft · Bruck an der Mur, AT

Key dates

Filing date	Jul 23, 2008
Grant date	Feb 19, 2013
Priority date	—
Expiry date	Feb 27, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3011
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.