Method and integrated circuit for secure encryption and decryption
US8379850B1 · kind B1 · utility
7Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Jun 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0637
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a cryptographic device is provided. The cryptographic device includes a persistent memory and a decryption control circuit coupled to the persistent memory. The decryption control circuit is configured to receive an encrypted data stream and decrypt a first portion of the encrypted data stream using a first cryptographic key stored in the persistent memory, the first portion including a second cryptographic key. The decryption circuit is configured to decrypt a second portion of the encrypted data stream using the second cryptographic key, the second portion of the encrypted data stream including payload data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.