Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto

US8380899B2 · kind B2 · utility

Assignees

• Infineon Technologies AG · DE
• Robert Bosch GmbH · DE

Inventors

• Jens Barrenscheen · Munich, DE
• Peter Rohm · Brackenheim, DE
• Hannes Estl · Klagenfurt, AT
• Axel Aue · Strohberg, DE
• Jens Graf · Gochsheim, DE
• Hermann Roozenbeek · Schwieberdingen, DE

Key dates

• Filing date: Jan 20, 2012
• Grant date: Feb 19, 2013
• Expiry date: Jan 20, 2032

Classification

• Technology area (CPC G): Physics
• CPC primary: G05B2219/25012
• WIPO field: Control
• WIPO sector: Instruments

Abstract

A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.