Variable-width memory module and buffer
US8380943B2 · kind B2 · utility
21Cited by
1References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 7, 2009 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Nov 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1694
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module having a plurality of memory devices and a memory buffer that translates between a variable width primary data port and a plurality of fixed width secondary data ports, each of which is coupled to one of the memory devices. The translation is effected by distributing the width of the primary data port to all or to a subset of the secondary data ports. In another aspect, the invention comprises a memory buffer that supports adjustable data width in a variety of ways.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.