Method and system for instruction stuffing operations during non-intrusive digital signal processor debugging
US8380966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2006 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Jul 25, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for the design and use of a digital signal processor, including (but not limited to) for processing transmissions in a communications (e.g., CDMA) system. Stuffing instructions in a processing pipeline of a multi-threaded digital signal processor provides for operating a core processor process and a debugging process within a debugging mechanism. Writing a stuff instruction into a debugging process registry and a stuff command in a debugging process command register provides for identifying a predetermined thread of the multi-threaded digital signal processor in which to execute the stuff instruction. The instruction stuffing process issues a debugging process control resume command during a predetermined stage of executing on the predetermined thread and directs the core processor to perform the stuff instruction during the debugging process. The core processor may then execute the stuffed instruction in association with the core processor process and the debugging process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.