Transistor with enhanced channel charge inducing material layer and threshold voltage control
US8384129B2 · kind B2 · utility
13Cited by
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25Claims
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Key dates
| Filing date | Jun 25, 2010 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Oct 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
Abstract
High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.