Patent · US Active

Context-sensitive overhead processor

US8385472B2 · kind B2 · utility

1Cited by

12References

20Claims

0Family size

Assignee

Altera Canada Co. · CA

Inventor

Wally Haas · St. John's, CA

Key dates

Filing date	Apr 11, 2011
Grant date	Feb 26, 2013
Priority date	—
Expiry date	Apr 11, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH04J3/1611
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

An overhead processor for data transmission in digital communications, where a state machine, including a logic element and a flip-flop, is able to process a “previous” data state and a “next” data state simultaneously by storing the previous state in an external elastic storage element until the next state arrives along the datapath. By employing flip-flops on the path from the logic element to the elastic store and on the path from the elastic store to the logic element, data is transmitted faster, resulting in the ability for both the previous data state and the next data state to be transmitted simultaneously, in one clock cycle, requiring half of the transmission time required by prior art.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.