Patent · US Active

Manufacturing method and structure of non-volatile memory

US8389358B2 · kind B2 · utility

3Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 22, 2011
Grant dateMar 5, 2013
Priority date
Expiry dateNov 8, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6891

Abstract

A non-volatile memory structure includes a substrate; a poly gate structure formed on the substrate; a contact etching stop layer formed over the poly gate structure and including at least a silicon nitride layer and a first silicon oxide layer overlying the silicon nitride layer; and an inter-layer dielectric layer formed on the first silicon oxide layer. The first silicon oxide layer has a density higher than that of the inter-layer dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.