FinFET with separate gates and method for fabricating a finFET with separate gates
US8389392B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2009 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Oct 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6217
Abstract
The present invention relates to a FinFET with separate gates and to a method for fabricating the same. A dielectric gate-separation layer between first and second gate electrodes has an extension in a direction pointing from a first to a second gate layer that is smaller than a lateral extension of the fin between its opposite lateral faces. This structure corresponds with a processing method that starts from a covered basic FinFET structure with a continuous first gate layer, and proceeds to remove parts of the first gate layer and of a first gate-isolation layer through a contact opening to the gate layer. Subsequently, a replacement gate-isolation layer that at the same time forms the gate separation layer fabricated, followed by filling the tunnel with a replacement gate layer and a metal filling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.