Integration of low and high voltage CMOS devices
US8390077B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2012 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Jul 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0156
Abstract
A semiconductor device includes a semiconductor substrate having a first portion and a second portion and a first transistor of a first type formed in the first portion of the substrate, the first transistor being operable at a first voltage, and the first transistor including a doped channel region of a second type opposite of the first type. The semiconductor device also includes a second transistor of the second type formed in the second portion of the substrate, the second transistor being operable at a second voltage greater than the first voltage, the second transistor including an extended doped feature of the second type. Further, the semiconductor device includes a well of the first type in the semiconductor substrate under a gate of the second transistor, wherein the well does not extend directly under the extended doped feature and the extended doped feature does not extend directly under the well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.