Patent · US Active

Semiconductor device with reduced capacitance tolerance value

US8394696B2 · kind B2 · utility

1Cited by

3References

15Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Peter Baumgartner · Munich, DE
Philipp Riess · Munich, DE
Thomas Benetik · Munich, DE

Key dates

Filing date	Dec 17, 2010
Grant date	Mar 12, 2013
Priority date	—
Expiry date	Dec 17, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit uncorrelated process fluctuations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.