Method and system for identifying power defects using test pattern switching activity
US8397113B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2010 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Sep 14, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/30
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and system for identifying power defects using test pattern switching activity is disclosed. In one embodiment, a plurality of test patterns is applied to a circuit under test, and failure test patterns are identified from the plurality of test patterns by comparing the test result with the predicted test result. A switching activity count is obtained for each of the plurality of test patterns. Based on the switching activity count, ranks for each of the plurality of test patterns are provided. A correlation analysis is performed between the failure test patterns and the ranks of the switching activities. When there is a high correlation between the failure test pattern and the ranks of the switching activities, it is determined that the circuit likely contains a power defect. A power defect analysis is performed under the presence of the high correlation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.