Memory device
US8397132B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2010 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Jun 13, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An exemplary memory device has at least one memory chip that stores data and error correcting information. An error detecting circuit in the memory chip performs a calculation on the data and error correcting information to obtain error detection information indicating the locations of bit errors in the data. The uncorrected data and the error detection information are output from the memory chip. The uncorrected data and error detection information may also be output from the memory device, or the memory device may include a memory controller chip with an error correcting circuit that uses the error detection information to correct the bit errors and outputs corrected data from the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.