Method of manufacturing memory devices

US8399326B2 · kind B2 · utility

Assignee

• MACRONIX INTERNATIONAL CO., LTD. · TW

Inventors

• Ta-Wei Lin · Minxiong, TW
• Wen-Jer Tsai · Hualien City, TW

Key dates

• Filing date: May 24, 2010
• Grant date: Mar 19, 2013
• Expiry date: Jul 30, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/20

Abstract

Disclosed is a memory device and method of operation thereof. The memory device may include a source region and a drain region of a first dopant type, the source and drain regions contain a first semiconductor material; a body region of a second dopant type, the body region being sandwiched between the source and drain regions, the body comprising a second semiconductor material; a gate dielectric layer over at least the body region; and a gate comprising a conductive material over the gate dielectric layer. Specifically, one of the first semiconductor material and the second semiconductor material is lattice matched with the other of the first semiconductor material and the second semiconductor material and has an energy gap smaller than the energy gap of the other of the first semiconductor material and the second semiconductor material.