Conformality of oxide layers along sidewalls of deep vias
US8404583B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2011 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Feb 25, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76898
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.