Patent · US Active

Flexible bus driver

US8405423B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 30, 2008
Grant dateMar 26, 2013
Priority date
Expiry dateSep 30, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/018585
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A bus driver has a ground terminal and a first and a second terminal. In a first operation mode the bus driver provides at the first terminal a first output voltage comprising a first data signal; and at the second terminal the bus driver provides a second output voltage comprising a second data signal. In a second operation mode the bus driver provides at the first terminal a first output voltage comprising a third data signal; and at the second terminal the bus driver provides a second output voltage, wherein a curve of the second output voltage is synchronous however inverted in relation to a curve of the first output voltage. An engine comprises a bus driver as set out above.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.