Clock signal generating arrangement for a communication device
US8406702B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2008 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Aug 31, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock signal generating arrangement for a communication device generates a system clock signal at an output for use as a timing reference. The clock signal generating arrangement comprises a reference clock generator for generating a reference clock signal, a main clock generator for generating a main clock signal having a greater accuracy than the reference clock signal, a clock adjust circuit coupled to the reference clock generator for generating a compensated reference clock signal to compensate for error in the reference clock signal and a clock signal selector coupled to the reference clock generator the main clock generator and the clock adjust circuit. The clock signal selector selectively provides to the output of the clock signal generating arrangement as the system clock signal the compensated reference clock signal when an error in the reference clock signal reaches a first predetermined threshold and until the error in the reference clock signal has been compensated and otherwise the reference clock signal when the communication device is operating in an idle mode or the main clock signal when the communication device is operating in an active mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.