Method for fabricating a phase change memory

US8409883B2 · kind B2 · utility

Assignee

• Semiconductor Manufacturing International Corp. · CN

Inventors

• Fumitake Mieno · Kawasaki, JP
• Youfeng He · Shanghai, CN

Key dates

• Filing date: Jun 9, 2011
• Grant date: Apr 2, 2013
• Expiry date: Aug 18, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8828

Abstract

The invention provides a phase change memory and a method for forming the phase change memory. The phase change memory includes a storage region and a peripheral circuit region. The peripheral circuit region has a peripheral substrate, peripheral shallow trench isolation (STI) units in the peripheral substrate, and MOS transistors on the peripheral substrate and between the peripheral STI units. The storage region has a storage substrate, an N-type ion buried layer on the storage substrate, vertical LEDs on the on the N-type ion buried layer, storage shallow trench isolation (STI) units between the vertical LEDs, and phase change layers on the vertical LEDs and between the storage STI units. The storage STI units have thickness equal to thickness of the vertical LEDs. Each vertical LED comprises an N-type conductive region on the N-type ion buried layer, and a P-type conductive region on the N-type conductive region. The P-type conductive region contains SiGe. The peripheral STI units have thickness equal to thickness of the storage STI units. A top of P-type conductive region is flush with a top of the peripheral substrate. The P-type conductive region containing SiGe reduces drai…