Semiconductor storage device and manufacturing method thereof
US8410543B2 · kind B2 · utility
5Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2007 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Nov 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a non-volatile memory in which writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film serving as a charge accumulation layer, in order to realize a high efficiency of a hole injection from a gate electrode, the gate electrode of a memory cell comprises a laminated structure made of a plurality of polysilicon films with different impurity concentrations, for example, a two-layered structure comprising a p-type polysilicon film with a low impurity concentration and a p+-type polysilicon film with a high impurity concentration deposited thereon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.