Driver circuit
US8410817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2010 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Mar 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.