Write combining protocol between processors and chipsets
US8412855B2 · kind B2 · utility
0Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2010 |
| Grant date | Apr 2, 2013 |
| Priority date | — |
| Expiry date | Jan 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of processing write transactions provide for combining write transactions on an input/output (I/O) hub according to a protocol between the I/O hub and a processor. Data associated with the write transactions can be flushed to an I/O device without the need for proprietary software and specialized registers within the I/O device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.