Package carrier and manufacturing method thereof
US8415780B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 20, 2011 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Jun 11, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a package carrier is provided. A substrate having an upper and lower surface is provided. A first opening communicating the upper and lower surface of the substrate is formed. A heat conducting element is disposed inside the first opening, wherein the heat conducting element is fixed in the first opening via an insulating material. At least a through hole passing through the substrate is formed. A metal layer is formed on the upper and lower surface of the substrate and inside the through hole. The metal layer covers the upper and lower surface of the substrate, the heat conducting element and the insulating material. A portion of the metal layer is removed. A solder mask is formed on the metal layer. A surface passivation layer is formed and covers the metal layer exposed by the solder mask and the metal layer located inside the through hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.