Method and apparatus for sending test mode signals
US8422324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2011 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Jan 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/46
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test mode signal system includes: a test mode block for generating a plurality, N, of test mode signals; a test mode send block, for generating and outputting a pulsed signal according to a command signal, and for multiplexing the N test mode signals in sets according to the pulsed signal and outputting the multiplexed pairs of test mode signals over M signal wires wherein M is less than N, such that each signal wire carries a multiplexed set of the N test mode signals; and a test mode receive block, for receiving the multiplexed sets of N test mode signals and the pulsed signal and demultiplexing each multiplexed set of N test mode signals according to the pulsed signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.