Memory repair system and method
US8423839B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2011 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | May 23, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes an array of memory cells. The array of memory cells includes redundant memory cells. The redundant memory cells include at least two of a redundant row and a redundant column of memory cells. The repair module is configured to (i) identify at least two of a row and a column of the array of memory cells having non-operational memory cells and (ii) substitute the at least two of the row and the column of the array of memory cells with selected rows or columns of the redundant memory cells based on X predetermined sequences of substitutions. The repair module is configured to detect a failure in the array of memory cells that cannot be repaired using the X predetermined sequences of substitutions, and use an alternative repair sequence to repair the non-operational memory cells based on the detection of the failure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.