Patent · US Active

Early noise detection and noise aware routing in circuit design

US8423940B2 · kind B2 · utility

21Cited by

10References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Lukas Daellenbach · Altdorf, DE
Elmar Gaugler · Eppelheim, DE
Wilhelm Haller · Winnenden, DE
Ralf Richter · Dresden, DE

Key dates

Filing date	Aug 15, 2011
Grant date	Apr 16, 2013
Priority date	—
Expiry date	Aug 15, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computerized method, data processing system and computer program product reduce noise for a buffered design of an electronic circuit which was already placed and routed. For all areas between a power stripe and a ground stripe (half bay) in the design, the shapes are divided in different criticality levels. The shapes are rearranged based on their criticality level such that shapes with higher criticality level are placed closer to the stripes than those with lower criticality level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.