Task assignment on heterogeneous three-dimensional/stacked microarchitectures
US8424006B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2010 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Jul 1, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of enhancing performance of a three-dimensional microarchitecture includes determining a computational demand for performing a task, selecting an optimization criteria for the task, identifying at least one computational resource of the microarchitecture configured to meet the computational demand for performing the task, and calculating an evaluation criteria for the at least one computational resource based on the computational demand for performing the task. The evaluation criteria defines an ability of the computational resource to meet the optimization criteria. The method also includes assigning the task to the computational resource based on the evaluation criteria of the computational resource in order to proactively avoid creating a hot spot on the three-dimensional microarchitecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.