CMOS devices with Schottky source and drain regions

US8426298B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Chih-Hsin Ko · Fongshan, TW
• Hung-Wei Chen · Zhubei City, TW
• Chung-Hu Ke · Taipei, TW
• Wen-Chin Lee · Baoshan, TW

Key dates

• Filing date: May 23, 2011
• Grant date: Apr 23, 2013
• Expiry date: May 23, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

A semiconductor structure includes a semiconductor substrate, and an NMOS device at a surface of the semiconductor substrate, wherein the NMOS device comprises a Schottky source/drain extension region. The semiconductor structure further includes a PMOS device at the surface of the semiconductor substrate, wherein the PMOS device comprises a source/drain extension region comprising only non-metal materials. Schottky source/drain extension regions may be formed for both PMOS and NMOS devices, wherein the Schottky barrier height of the PMOS device is reduced by forming the PMOS device over a semiconductor layer having a low valence band.