Patent · US Active

Method, electronic design automation tool, computer program product, and data processing program for creating a layout for design representation of an electronic circuit and corresponding port for an electronic circuit

US8429584B2 · kind B2 · utility

2Cited by
10References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 23, 2010
Grant dateApr 23, 2013
Priority date
Expiry dateApr 8, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for creating a layout for design representation of an electronic circuit with at least one port. The method includes segmenting the at least one port in the design representation into different regions, classifying the different regions of the at least one port according to timing and/or electronic and/or layout characteristics, assigning a priority for each classified region of the at least one port according to rules based on the timing and/or electronic and/or layout characteristics, and routing the design representation by accessing at least one of the classified regions of the port according to an order of the assigned priorities.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.