Inventor · Sindelfingen, DE

Thomas Ludwig

24Patents
12h-index
34Co-inventors
81Inventor score

Filing activity: Oct 20, 1987 → Nov 19, 2010

Most-cited inventions

PatentTitleAreaCited byStatus
US7315994B2 Method and device for automated layer generation for double-gate FinFET designs Electricity 167 Expired
US7309626B2 Quasi self-aligned source/drain FinFET process Electricity 130 Expired
US6909147B2 Multi-height FinFETS Electricity 120 Expired
US7456471B2 Field effect transistor with raised source/drain fin straps Electricity 74 Active
US5016087A Integrated circuit package Emerging Cross-Sectional Technologies 39 Expired
US5744996A CMOS integrated semiconductor circuit Physics 31 Expired
US4815113A Method for digital slope control of output signals of power amplifiers in semiconductor chips Electricity 22 Expired
US5162264A Integrated circuit package Emerging Cross-Sectional Technologies 20 Expired
US5680063A Bi-directional voltage translator Electricity 16 Expired
US7323374B2 Dense chevron finFET and method of manufacturing same Electricity 16 Expired
US7851283B2 Field effect transistor with raised source/drain fin straps Electricity 14 Active
US8418110B2 Using port obscurity factors to improve routing Physics 12 Active
US5306866A Module for electronic package Electricity 12 Expired
US5928319A Combined binary/decimal adder unit Physics 7 Expired
US8020120B2 Layout quality gauge for integrated circuit design Physics 7 Active
US4967104A Circuit for increasing the output impedance of an amplifier Electricity 2 Expired
US8762919B2 Circuit macro placement using macro aspect ratio based on ports Physics 2 Active
US5944772A Combined adder and logic unit Physics 2 Expired
US8429584B2 Method, electronic design automation tool, computer program product, and data processing program for creating a layout for design representation of an electronic circuit and corresponding port for an electronic circuit Physics 2 Active
US7962877B2 Port assignment in hierarchical designs by abstracting macro logic Physics 2 Active
US7990158B2 Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters Physics 1 Active
US8495551B2 Shaping ports in integrated circuit design Physics 0 Active
US8423947B2 Gridded glyph geometric objects (L3GO) design method Emerging Cross-Sectional Technologies 0 Active
US8963294B2 Dense chevron finFET and method of manufacturing same Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.