Bias potential generating circuit
US8432194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2010 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Dec 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/08
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A bias potential generating circuit includes a clock supply circuit that generates a clock signal having a predetermined frequency; a rising sine wave generating circuit that generates a rising wave form signal having a wave form of a rising portion of a sine wave; a ΔΣ conversion circuit that generates a pulse width modulation signal by pulse width modulating the rising wave form signal; a first resistor, one end connected to a reference potential input terminal of an operational amplifier; a second resistor, one end connected to the first resistor and to the reference potential input terminal of the operational amplifier, and the other end being grounded; and a switch connected to a power supply and to the other end of the first resistor, the switch being turned ON and OFF by the pulse width modulation signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.