Strided block transfer instruction
US8432409B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2005 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Sep 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer readable medium embodies a set of instructions. The set of instructions includes an instruction to manipulate a processor to determine a first value representative of a source memory location of a source storage component, a second value representative of a destination memory location of a destination storage component, a third value representative of a number of lines of a data block to be transferred from the source storage component to the destination storage component, a fourth value representative of a number of bytes to be transferred per line of the data block, a fifth value representative of a byte width of the source storage component and a sixth value representative of a byte width of the destination storage component. The instruction further is to transfer a data block from the source storage component to the destination storage component based on the first, second, third, fourth, fifth and sixth values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.