Schematic wire annotation tool
US8434051B2 · kind B2 · utility
2Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2009 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Sep 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of automating circuit design is provided and includes storing one or more circuit design schematics in a memory, providing, by way of an interface, a plurality of search parameters for searching for nets of the schematics in the memory, searching for nets of the schematics in the memory in accordance with search parameters input into the interface and presenting, by way of the interface, information associated with a net matching the received search parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.