SiC power vertical DMOS with increased safe operating area
US8436367B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2011 |
| Grant date | May 7, 2013 |
| Priority date | — |
| Expiry date | Nov 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
Abstract
A SiC Power Semiconductor device of the Field Effect Type (MOSFET, IGBT or the like) with “muted” channel conduction, negative temperature coefficient of channel mobility, in situ “ballasted” source resistors and optimized thermal management of the cells for increased Safe Operating Area is described. Controlling the location of the Zero Temperature Crossover Point (ZTCP) in relationship to the drain current is achieved by the partition between the “active” and “inactive” channels and by adjusting the mobility of the carriers in the channel for the temperature range of interest. The “Thermal management” is realized by surrounding the “active” cells/fingers with “inactive” ones and the “negative” feedback of the drain/collector current due to local increase of the gate bias is achieved by implementing in-situ “ballast” resistors inside of each source contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.